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Circuit diagram of nc64 motherboard

the running speed of NC 64 is very slow

HP COMPAD NC64

Chipset: 945PM+GBM plate number: LA-2952

Failure: the running speed is very slow after starting, and it takes 5 minutes to light up and enter the system.

according to the customer's feedback, the maintenance process is slow, very slow. Disassemble the machine and visually observe that the motherboard has no traces of maintenance, and there is no obvious corrosion and water ingress. Since it is a machine that can light up, the problem of chipset will be ruled out temporarily. According to the inspiration of a movement of DELL, it is suspected that there is something wrong with the adapter detection circuit. KBC can't recognize the existence of the adapter normally, and uses the CPU down-frequency, which leads to a slow running speed. First, the adapter is connected to the motherboard through the PCN1 power interface, and the ADPIN supplies power to the motherboard with the voltage of the interface inner wall of 18.5V and the voltage of the pin in the middle is 6.5V, which is named ADP_SIGNAL. ADP_SIGNAL is connected to the LM393 voltage comparator PU25, and VIN provides its working voltage. PQ62 is an enhanced P-channel MOS. According to Figure 2, the voltage at the third pin of PU25A is equal to the ADP_SIGNAL voltage, which is about 6.5V, and the voltage at the second pin is VIN, which is divided by two resistors. His voltage can be calculated and I=U/R according to Ohm's law. The two resistors in this circuit are connected in series, so its resistance is R=PR224+PR236=32.6K ohms.. Suppose VIN=18.5V, so

I=18.5/32.6K4 Now that the current value of the series circuit has been calculated, the voltage on PR236 can be calculated according to Ohm's Law: UPR 236 = 1k * 18.5/32.6k = 185/32.6 = 5.67V7 According to the simple calculation above, the voltage divider can be simplified to UPR. 5.7V, so there is a high level ADP_ID pulled up by +3VALW on the 5th pin and sent to KBC. Therefore, it can be deduced here how much V is greater when VIN is abnormal, and ADP_ID will not be output to KBC at this time. Let the abnormal voltage be X, and the equation can be X * 1K/32.6K = 6.5 < P > X/3.26 = 6.5: X = 21.19 When the adapter is abnormal, the voltage of VIN is greater than 21.2V, which may cause the motherboard to fail to trigger or other abnormal conditions. Then the comparison state of PU25B is that ADP_SIGNAL reaches the sixth pin, and VIN is divided to the fifth pin through two resistors. Through calculation, it can be known that the voltage at the fifth pin of PU25 is The ADP_EN# communication isolation tube PD7 controls the conduction of PQ3, which is an enhanced P-channel MOS. When the voltage at the fourth pin is low, the p>P2 state voltage < P > is conducted to PQ4, and PQ4 is also a P-tube. At this time, the ACDRV# at the G level is low, so B+ is output smoothly. At this time, the VCC of the charge-discharge chip BQ2473 also has main power supply. At this time, the B+ obtained by the system power supply chip MAX1999 also generates a VL voltage of 5V, and the +3VALWP and +5VALWP with ON3 and ON5 in high-level standby are generated on another comparator PU3A. The voltage of the third pin is 1.85V, and the second pin has 5V pull-up, so the first pin is low. At this time, the ACDET is low, and it is not the gate to PU4. Turn it over and output 3.3V ADP_PERS to BQ2473. When the voltage of ACDET is smaller than ADP_PERS, BQ2373 keeps the voltage of ACDRV# at about 9V, so that the P tube can keep the voltage of B+ smoothly. Now, let's go back to the original adapter detection part. The actual measurement shows that PQ62 is normal and the D-class voltage is V. However, the first pin voltage of PD25 is 18V. Let's analyze which signals will be abnormal if the voltage is 18V. The 18V from PQ58' s Class C will be sent to the fifth pin of PU21, and the 18V is definitely greater than the sixth pin-class, so the 18V from seven pins will be output to PU24. They are sent to the first stage of two comparators respectively. Unfortunately, the voltage of the+stage is pulled up by +3V and +5V at this time, so there is no room for comparison. The two signals, ADP_PS and ADP_PS1, which are output at low level, are also connected to KBC and then catch up with its 18V. It is found that PQ58 is the transistor of PNP result. At this time, the B stage has a high level of 18.5V, so why is it still 18V in the C stage? Therefore, it is judged that PQ55 is still available. After changing the PNP transistor, the voltage of class C is V, and the voltage of pin 5 of PU24 under test is V, and the voltage of pin 6 is V, and the output of pin 7 is low. At this time, the voltage of pin 2 and pin 6 is low, and the voltage of pin 3 and pin 5 is .9V Therefore, at this time, (ADP_PS and ADP_PS1 are both sent to KBC at a high level of 3.3V, and installed in the system for 3 seconds. Fault repair