Look at this, it's transferred from the MCU website.
AT89C5 1 is a low-voltage and high-performance CMOS8-bit microprocessor, which is equipped with 4K byte flash programmable erasable read-only memory, commonly known as single chip microcomputer. AT89C205 1 is a single-chip microcomputer with a 2-kilobyte flash programmable erasable read-only memory. Single-chip erasable read-only memory can be rewritten 100 times. The device is manufactured by ATMEL high-density nonvolatile memory manufacturing technology, which is compatible with the industrial standard MCS-5 1 instruction set and output pins. Due to the combination of multifunctional 8-bit CPU and flash memory on one chip, AT89C5 1 of ATMEL is an efficient microcontroller, and AT89C205 1 is its simplified version. AT89C single chip microcomputer provides a flexible and cheap scheme for many embedded control systems.
1. Main features:
Compatible with MCS-5 1
4 K byte programmable flash memory
Life: 1000 write/erase cycles
Data retention time: 10 year
Full static operation: 0Hz-24Hz
Three-level program memory locking
128 * 8-bit internal RAM
32 programmable input and output lines
Two 16-bit timers/counters
5 interrupt sources
Programmable serial channel
Low power idle and power saving modes
On-chip oscillator and clock circuit
2.Pin description:
VCC: supply voltage.
GND: grounded.
P0 port: P0 port is an 8-bit open bidirectional I/O port with drain level, and each pin can absorb 8TTL gate current. When the pin of the P 1 port writes 1 for the first time, it is defined as a high impedance input. P0 can be used for external program data storage and can be defined as the 8th bit of data/address. When programming FIASH, P0 port is used as the source code input port. When checking FIASH, P0 outputs the source code. At this point, the outside of P0 must be pulled high.
P 1 port: The P 1 port is an 8-bit bidirectional I/O port with built-in pull-up resistor. The P 1 port buffer can receive and output 4TTL gate current. After the pin of P 1 is written into 1, it is pulled up internally and can be used as an input. When the pin of P 1 is pulled low externally, it will output current due to internal pull-up. During flash memory programming and verification, the P 1 port is received as the eighth address.
P2 port: P2 port is an 8-bit bidirectional I/O port with built-in pull-up resistor. P2 port buffer can receive and output four TTL gate currents. When P2 port is written with "1", its pin is pulled high by internal pull-up resistor and used as input. Therefore, when it is used as an input, the pin of P2 port is externally pulled low, and the current will be output. This is due to internal pull-up. When P2 port is used to access external program memory or external data memory with 16 bit address, P2 port outputs the upper eight bits of the address. When the address "1" is given, it uses internal pull-up. When reading and writing external eight-bit address data memory, P2 port outputs the contents of its special function register. During flash memory programming and verification, P2 port receives high-order eight-bit address signals and control signals.
P3 port: P3 port pin is 8 bidirectional I/O ports with internal pull-up resistors, which can receive and output 4 TTL gate currents. When P3 ports write "1", they are pulled high internally and used as inputs. As input, P3 will output current (ill) due to external pull-down of low level, which is due to pull-up.
P3 port can also be used as some special function ports of AT89C5 1, as shown in the following table:
Port pin substitution function
P3.0 RXD (serial input port)
P3. 1 TXD (serial output port)
P3.2 /INT0 (external interrupt 0)
P3.3 /INT 1 (external interrupt 1)
P3.4 T0 (external input of Timer0)
P3.5 T 1 (external input of timer 1)
P3.6 /WR (external data memory write strobe)
P3.7 /RD (external data memory read strobe)
P3 port receives some control signals for flash memory programming and program verification.
RST: reset the input. When the oscillator resets the device, the RST pin should remain high for two machine cycles.
ALE/PROG: When accessing external memory, the allowed output level of data latch is used to latch the status byte of the address. During FLASH programming, this pin is used to input programming pulses. Under normal circumstances, the ALE terminal outputs a positive pulse signal with a constant frequency period, which is 1/6 of the oscillator frequency. Therefore, it can be used as an external output pulse or for timing purposes. However, it should be noted that when it is used as an external data memory, the ALE pulse will be skipped. If you want to disable the output of ALE, you can set 0 at SFR8EH address. At this point, ALE only works when executing MOVX and MOVC instructions. In addition, this pin is pulled high slightly. If the microprocessor is disabled in the external execution state ALE, this setting is invalid.
/PSEN: the strobe signal of the external program memory. When fetching data from external program memory, /PSEN is valid twice in each machine cycle. However, when accessing the external data memory, these two valid /PSEN signals will not appear.
/EA/VPP: When /EA is kept low, the external program memory (0000H-FFFFH) during this period, regardless of whether there is internal program memory. Note that when the encryption method is 1, /EA will lock the inside and reset it; ; When the /EA terminal remains high, the internal program memory is here. During flash programming, this pin is also used to apply 12V programming power supply (VPP).
XTAL 1: the input of the reverse oscillation amplifier and the input of the internal clock working circuit.
XTAL2: the output of the inverse oscillator.
3. Oscillator characteristics:
XTAL 1 and XTAL2 are the input and output of the inverting amplifier, respectively. The inverting amplifier can be configured as an on-chip oscillator. Stone crystal oscillation and ceramic oscillation can be used. XTAL2 should not be connected if an external clock source is used to drive the device. The redundant clock signal input to the internal clock must pass through the divide-by-two trigger, so there is no requirement for the pulse width of the external clock signal, but the width required for the high level and low level of the pulse must be ensured.
4. Chip erasure:
By combining the correct control signals and keeping the ALE pin at the low level of 10 ms, the entire PEROM array and three lock bits can be electrically erased ... In the chip erasing operation, all code arrays are written with "1", and this operation must be performed before any non-empty memory bytes are repeatedly programmed.
In addition, AT89C5 1 is equipped with steady-state logic, which can be used under the condition of low to zero frequency, and supports two software-selectable power-down modes. In idle mode, the CPU stops working. But the RAM, timer, counter, serial port and interrupt system are still working. In power-down mode, the contents of RAM are saved, the oscillator is frozen, and other chip functions are prohibited until the next hardware reset.
Below is the picture link of this single chip microcomputer.